SiFive Announces RISC‑V AI Cores with Integrated NPU and Custom Instruction Layers

Introduction

On May 19, 2025, SiFive announced a new generation of RISC‑V-based AI inference processors designed for ultra-efficient edge workloads and custom model execution. The new cores—dubbed Intelligence X300—are built with configurable instruction sets, integrated NPUs, and secure enclaves for trusted local inference.

“Edge AI needs not just silicon, but sovereignty,” said Patrick Little, CEO of SiFive.¹ “We built Intelligence X300 to let developers shape the ISA to fit their models—not the other way around.”

Each core includes support for 4-bit, 8-bit, and hybrid token operations, along with SiFive’s new Vector AI Extensions (VAX), designed to accelerate the device’s transformers and vision‑language models. Power budgets start at just 250 mW, making the X300 series ideal for industrial, automotive, and wearable markets.

Why it matters now

• RISC-V enables sovereign computing by avoiding U.S.-licensed architectures.
• Custom instruction sets allow AI acceleration without ASIC cost or GPU power.
• Embedded NPUs create a middle path between MCUs and large inference chips.

Call‑out: SiFive’s X300 puts model customization at the heart of the ISA

Developers can now tune the instruction set for specific model structures—bringing architectural agility to edge AI.

Business implications

OEMs building inference‑native devices can gain performance and cost advantages by embedding X300 cores instead of offloading to third‑party modules. Custom instruction support could also streamline regulatory certification in privacy‑sensitive industries.

Vendors working in regulated sectors (e.g., healthcare, defense) may prefer RISC‑V platforms with open toolchains and local model auditability. The X300’s secure enclave and zero‑trust‑ready firmware stack will be key for compliant deployments.

Looking ahead

SiFive expects to ship evaluation boards in July, with commercial availability in early 2026. Partners include Bosch, Denso, and at least one major smartphone manufacturer rumored to be exploring RISC‑V co‑processors.

Gartner predicts that by 2029, 30% of AI edge inference will rely on customizable ISAs, especially in global markets seeking alternatives to x86 and Arm licensing.

The upshot: With X300, SiFive proves that the AI edge isn’t just about smaller models but more innovative, sovereign silicon. The instruction set just became a business differentiator.

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¹ Patrick Little, SiFive Product Launch Briefing, May 19, 2025.

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